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//****************************************************************************
//
// main.c - MSP-EXP432P401R + Educational Boosterpack MkII - Microphone FFT
//
// CMSIS DSP Software Library is used to perform 512-point FFT on
// the audio samples collected with MSP432's ADC14 from the Education
// Boosterpack's onboard microhpone. The resulting frequency bin data
// is displayed on the BoosterPack's 128x128 LCD.
//
//****************************************************************************
#include "msp.h"
#include <driverlib.h>
#include <stdio.h>
#define TEST_LENGTH_SAMPLES 512
#define SAMPLE_LENGTH 512
/* ------------------------------------------------------------------
* Global variables for FFT Bin Example
* ------------------------------------------------------------------- */
uint32_t fftSize = SAMPLE_LENGTH;
uint32_t ifftFlag = 0;
uint32_t doBitReverse = 1;
#define SMCLK_FREQUENCY 48000000
#define SAMPLE_FREQUENCY 8000
/* DMA Control Table */
#ifdef ewarm
#pragma data_alignment=256
#else
#pragma DATA_ALIGN(controlTable, 256)
#endif
uint8_t controlTable[256];
/* FFT data/processing buffers*/
float hann[SAMPLE_LENGTH];
int16_t data_array1[SAMPLE_LENGTH];
int16_t data_array2[SAMPLE_LENGTH];
int16_t data_input[SAMPLE_LENGTH*2];
int16_t data_output[SAMPLE_LENGTH];
volatile int switch_data = 0;
uint32_t color = 0;
/* Timer_A PWM Configuration Parameter */
Timer_A_PWMConfig pwmConfig =
{
TIMER_A_CLOCKSOURCE_SMCLK,
TIMER_A_CLOCKSOURCE_DIVIDER_1,
(SMCLK_FREQUENCY/SAMPLE_FREQUENCY),
TIMER_A_CAPTURECOMPARE_REGISTER_1,
TIMER_A_OUTPUTMODE_SET_RESET,
(SMCLK_FREQUENCY/SAMPLE_FREQUENCY)/2
};
void main(void)
{
/* Halting WDT and disabling master interrupts */
MAP_WDT_A_holdTimer();
MAP_Interrupt_disableMaster();
/* Set the core voltage level to VCORE1 */
MAP_PCM_setCoreVoltageLevel(PCM_VCORE1);
/* Set 2 flash wait states for Flash bank 0 and 1*/
MAP_FlashCtl_setWaitState(FLASH_BANK0, 2);
MAP_FlashCtl_setWaitState(FLASH_BANK1, 2);
/* Initializes Clock System */
MAP_CS_setDCOCenteredFrequency(CS_DCO_FREQUENCY_48);
MAP_CS_initClockSignal(CS_MCLK, CS_DCOCLK_SELECT, CS_CLOCK_DIVIDER_1 );
MAP_CS_initClockSignal(CS_HSMCLK, CS_DCOCLK_SELECT, CS_CLOCK_DIVIDER_1 );
MAP_CS_initClockSignal(CS_SMCLK, CS_DCOCLK_SELECT, CS_CLOCK_DIVIDER_1 );
MAP_CS_initClockSignal(CS_ACLK, CS_REFOCLK_SELECT, CS_CLOCK_DIVIDER_1);
Timer_A_generatePWM(TIMER_A0_BASE, &pwmConfig);
/* Initializing ADC (MCLK/1/1) */
ADC14_enableModule();
ADC14_initModule(ADC_CLOCKSOURCE_MCLK, ADC_PREDIVIDER_1, ADC_DIVIDER_1, 0);
ADC14_setSampleHoldTrigger(ADC_TRIGGER_SOURCE1, false);
/* Configuring GPIOs (4.3 A10) */
GPIO_setAsPeripheralModuleFunctionInputPin(GPIO_PORT_P4, GPIO_PIN3,
GPIO_TERTIARY_MODULE_FUNCTION);
/* Configuring ADC Memory */
ADC14_configureSingleSampleMode(ADC_MEM0, true);
ADC14_configureConversionMemory(ADC_MEM0, ADC_VREFPOS_AVCC_VREFNEG_VSS,
ADC_INPUT_A10, false);
/* Set ADC result format to signed binary */
ADC14_setResultFormat(ADC_SIGNED_BINARY);
/* Configuring DMA module */
DMA_enableModule();
DMA_setControlBase(controlTable);
DMA_disableChannelAttribute(DMA_CH7_ADC14,
UDMA_ATTR_ALTSELECT | UDMA_ATTR_USEBURST |
UDMA_ATTR_HIGH_PRIORITY |
UDMA_ATTR_REQMASK);
/* Setting Control Indexes. In this case we will set the source of the
* DMA transfer to ADC14 Memory 0
* and the destination to the
* destination data array. */
MAP_DMA_setChannelControl(UDMA_PRI_SELECT | DMA_CH7_ADC14,
UDMA_SIZE_16 | UDMA_SRC_INC_NONE | UDMA_DST_INC_16 | UDMA_ARB_1);
MAP_DMA_setChannelTransfer(UDMA_PRI_SELECT | DMA_CH7_ADC14,
UDMA_MODE_PINGPONG, (void*) &ADC14->MEM[0],
data_array1, SAMPLE_LENGTH);
MAP_DMA_setChannelControl(UDMA_ALT_SELECT | DMA_CH7_ADC14,
UDMA_SIZE_16 | UDMA_SRC_INC_NONE | UDMA_DST_INC_16 | UDMA_ARB_1);
MAP_DMA_setChannelTransfer(UDMA_ALT_SELECT | DMA_CH7_ADC14,
UDMA_MODE_PINGPONG, (void*) &ADC14->MEM[0],
data_array2, SAMPLE_LENGTH);
/* Assigning/Enabling Interrupts */
MAP_DMA_assignInterrupt(DMA_INT1, 7);
MAP_Interrupt_enableInterrupt(INT_DMA_INT1);
MAP_DMA_assignChannel(DMA_CH7_ADC14);
MAP_DMA_clearInterruptFlag(7);
MAP_Interrupt_enableMaster();
/* Now that the DMA is primed and setup, enabling the channels. The ADC14
* hardware should take over and transfer/receive all bytes */
MAP_DMA_enableChannel(7);
MAP_ADC14_enableConversion();
while(1)
{
MAP_PCM_gotoLPM0();
}
}
/* Completion interrupt for ADC14 MEM0 */
void DMA_INT1_IRQHandler(void)
{
/* Switch between primary and alternate bufferes with DMA's PingPong mode */
if (DMA_getChannelAttribute(7) & UDMA_ATTR_ALTSELECT)
{
DMA_setChannelControl(UDMA_PRI_SELECT | DMA_CH7_ADC14,
UDMA_SIZE_16 | UDMA_SRC_INC_NONE | UDMA_DST_INC_16 | UDMA_ARB_1);
DMA_setChannelTransfer(UDMA_PRI_SELECT | DMA_CH7_ADC14,
UDMA_MODE_PINGPONG, (void*) &ADC14->MEM[0],
data_array1, SAMPLE_LENGTH);
switch_data = 1;
}
else
{
DMA_setChannelControl(UDMA_ALT_SELECT | DMA_CH7_ADC14,
UDMA_SIZE_16 | UDMA_SRC_INC_NONE | UDMA_DST_INC_16 | UDMA_ARB_1);
DMA_setChannelTransfer(UDMA_ALT_SELECT | DMA_CH7_ADC14,
UDMA_MODE_PINGPONG, (void*) &ADC14->MEM[0],
data_array2, SAMPLE_LENGTH);
switch_data = 0;
}
}