使用MSP430FR2311 I2C作为从机,主机读取数据失败,跟踪发现主机发送起始信号后状态返回失败
从机代码如下:
P1DIR &= ~(BIT2|BIT3); //设置为输入方向
P1REN &= ~(BIT2|BIT3); //上拉下拉禁止使能
P1SEL1 &= ~(BIT2|BIT3); //设置管脚复用
P1SEL0 |= (BIT2|BIT3);
//Disable the USCI module
UCB0CTLW0 |= UCSWRST;
//Clear USCI master mode
UCB0CTLW0 &= ~UCMST;
//Configure I2C as Slave and Synchronous mode
UCB0CTLW0 |= UCMODE_3 + UCSYNC;
//Set up the slave address.
UCB0I2COA0 = SMspI2c_SlaveAddr | UCOAEN; // own address is 0x48 + enable
UCB0CTLW0 &= ~UCSWRST; // clear reset register
//Clear the I2C interrupt source.
UCB0IFG &= ~(UCRXIFG0 | UCTXIFG0);
//Enable the interrupt masked bit
UCB0IE |= (UCRXIE0 | UCTXIE0);
__bis_SR_register(GIE);
#pragma vector = USCI_B0_VECTOR
__interrupt void USCIB0_ISR(void)
{
SMspIo_OutputLevel(PortRedLed,SBase_IoLevel_High);
switch(__even_in_range(UCB0IV,UCIV__UCBIT9IFG))
{
case 0x00: break; // Vector 0: No interrupts break;
case 0x02: break; // Vector 2: ALIFG break;
case 0x04: break; // Vector 4: NACKIFG break;
case 0x06: break; // Vector 6: STTIFG break;
case 0x08: break; // Vector 8: STPIFG break;
case 0x0a: break; // Vector 10: RXIFG3 break;
case 0x0c: break; // Vector 14: TXIFG3 break;
case 0x0e: break; // Vector 16: RXIFG2 break;
case 0x10: break; // Vector 18: TXIFG2 break;
case 0x12: break; // Vector 20: RXIFG1 break;
case 0x14: break; // Vector 22: TXIFG1 break;
case 0x16: // Vector 24: RXIFG0 break;
//RXData = UCB0RXBUF;
break;
case 0x18: // Vector 26: TXIFG0 break;
UCB0TXBUF = 0xA5;
break;
case 0x1a: break; // Vector 28: BCNTIFG break;
case 0x1c: break; // Vector 30: clock low timeout break;
case 0x1e: break; // Vector 32: 9th bit break;
default: break;
}
}