//方案1,使用外部32.768晶振配置 XT1CLK
P2SEL1 |= BIT6 | BIT7; // P2.6~P2.7: crystal pins
do
{
CSCTL7 &= ~(XT1OFFG | DCOFFG); // Clear XT1 and DCO fault flag
SFRIFG1 &= ~OFIFG;
} while (SFRIFG1 & OFIFG); // Test oscillator fault flag
__bis_SR_register(SCG0); // disable FLL
CSCTL3 |= SELREF__XT1CLK; // Set XT1 as FLL reference source
CSCTL0 = 0; // clear DCO and MOD registers
CSCTL1 &= ~(DCORSEL_7); // Clear DCO frequency select bits first
CSCTL1 |= DCORSEL_0; // Set DCO = 1MHz
CSCTL2 = FLLD_0 + 30; // DCOCLKDIV = 1MHz
__delay_cycles(3);
__bic_SR_register(SCG0); // enable FLL
while(CSCTL7 & (FLLUNLOCK0 | FLLUNLOCK1)); // FLL locked
CSCTL4 = SELMS__DCOCLKDIV | SELA__XT1CLK; // set XT1 (~32768Hz) as ACLK source, ACLK = 32768Hz
// Disable the GPIO power-on default high-impedance mode to activate
// previously configured port settings
PM5CTL0 &= ~LOCKLPM5;
// Configure RTC**********************************************/
// 1024/32768 * 1920 = 60 sec.
RTCMOD = 1920-1;
// Initialize RTC
// Source = ACLK, divided by 1024
SYSCFG2 |= RTCCKSEL; // Select ACLK as RTC clock
RTCCTL = RTCSS_1 | RTCSR | RTCPS__1024;
//方案2,使用内部REFOCLK配置
__bis_SR_register(SCG0); // disable FLL
CSCTL3 |= SELREF__REFOCLK; // Set REFOCLK as FLL reference source
CSCTL0 = 0; // clear DCO and MOD registers
CSCTL1 &= ~(DCORSEL_7); // Clear DCO frequency select bits first
CSCTL1 |= DCORSEL_0; // Set DCO = 1MHz
CSCTL2 = FLLD_0 + 30; // DCOCLKDIV = 1MHz
__delay_cycles(3);
__bic_SR_register(SCG0); // enable FLL
while(CSCTL7 & (FLLUNLOCK0 | FLLUNLOCK1)); // FLL locked
CSCTL4 = SELMS__DCOCLKDIV | SELA__REFOCLK; // set REFOCLK (~32768Hz) as ACLK source, ACLK = 32768Hz
// Disable the GPIO power-on default high-impedance mode to activate
// previously configured port settings
PM5CTL0 &= ~LOCKLPM5;
// Configure RTC**********************************************/
// 1024/32768 * 1920 = 60 sec.
RTCMOD = 1920-1;
// Initialize RTC
// Source = ACLK, divided by 1024
SYSCFG2 |= RTCCKSEL; // Select ACLK as RTC clock
RTCCTL = RTCSS_1 | RTCSR | RTCPS__1024;
进入休眠lpm3模式,发现方案1(外部32.768K晶振)比方案2(内部32.768K晶振)的功耗高15uA,这是为什么?