msp430fr2311 FRAM读写问题，IAR6.50.1

msp430fr2311 FRAM读写有问题，这是我重管网代码移植过来的，请协助看下是那得问题，项目很紧急,，谢谢了！！！

#include "msp430.h"
//#include "msp430fr2311.h"
#include "spi.h"
#include "MyDef.h"


#define   uint  unsigned int
#define   uchar unsigned char
#define   ulong unsigned long;
#define   MCLK_FREQ_MHZ 8                     // MCLK = 8MHz


#define FRAM_TEST_START 0xFD00               //FF80h-FFFFh,0xFD00

void FRAMWrite(void);
void Init_GPIO();
void Software_Trim();                       // Software Trim to get the best DCOFTRIM value
uchar UART_RX(void);
void FRAMRead (void);

unsigned char count = 0;
unsigned long *FRAM_write_ptr;
unsigned int data;

uchar Udata[10];
uchar Tdata[10];
uchar data_i=0;
uchar data_Full_falg=0;
uint  Uval;


int main(void)
{
  WDTCTL = WDTPW | WDTHOLD;                // Stop watchdog timer

  // Configure GPIO
  Init_GPIO();
  
  PM5CTL0 &= ~LOCKLPM5;                    // Disable the GPIO power-on default high-impedance mode
                                           // to activate 1previously configured port settings
  /*

  __bis_SR_register(SCG0);                 // disable FLL
  CSCTL3 |= SELREF__REFOCLK;               // Set REFO as FLL reference source
  CSCTL1 = DCOFTRIMEN_1 | DCOFTRIM0 | DCOFTRIM1 | DCORSEL_3;// DCOFTRIM=3, DCO Range = 8MHz
  CSCTL2 = FLLD_0 + 243;                  // DCODIV = 8MHz
  __delay_cycles(3);
  __bic_SR_register(SCG0);                // enable FLL
  Software_Trim();                        // Software Trim to get the best DCOFTRIM value

  CSCTL4 = SELMS__DCOCLKDIV | SELA__REFOCLK; // set default REFO(~32768Hz) as ACLK source, ACLK = 32768Hz
                                           // default DCODIV as MCLK and SMCLK source

  // Configure UART pins
  P1SEL0 |= BIT6 | BIT7;                    // set 2-UART pin as second function

  // Configure UART
  UCA0CTLW0 |= UCSWRST;
  UCA0CTLW0 |= UCSSEL__SMCLK;

  // Baud Rate calculation
  // 8000000/(16*9600) = 52.083
  // Fractional portion = 0.083
  // User's Guide Table 17-4: UCBRSx = 0x49
  // UCBRFx = int ( (52.083-52)*16) = 1
  UCA0BRW_L = 52;                             // 8000000/16/9600
  UCA0BRW_H = 0x00;
  UCA0MCTLW = 0x4900 | UCOS16 | UCBRF1_L;
  
  */
   // Configure UART pins
  P1SEL0 |= BIT6 | BIT7;                    // set 2-UART pin as second function

  // Configure UART
  UCA0CTLW0 |= UCSWRST;
  UCA0CTLW0 |= UCSSEL_1;                    // set ACLK as BRCLK

  // Baud Rate calculation. Referred to UG 17.3.10
  // (1) N=32768/4800=6.827
  // (2) OS16=0, UCBRx=INT(N)=6
  // (4) Fractional portion = 0.827. Refered to UG Table 17-4, UCBRSx=0xEE.
  UCA0BR0 = 6;                              // INT(32768/4800)
  UCA0BR1 = 0x00;
  UCA0MCTLW = 0xEE00;

  UCA0CTLW0 &= ~UCSWRST;                    // Initialize eUSCI
  UCA0IE |= UCRXIE;                         // Enable USCI_A0 RX interrupt

  //__bis_SR_register(LPM3_bits|GIE);         // Enter LPM3, interrupts enabled
  __bis_SR_register(GIE);  
  //__no_operation();                         // For debugger
  
  FRAM_write_ptr = (unsigned long *)FRAM_TEST_START;
  init_def();
  //FRAMRead();
  
  while(1)
  {
  
    UART_RX();
    
  
  }
  
  
}

void delay(uint val)
{
  uint i;
  
  for(i=0;i<val;i++);
  
}


void FRAMWrite (void)
{
    unsigned int i=0;

    SYSCFG0 = FRWPPW;
    //SYSCFG0 &= ~PFWP;
    //SYSCFG0 &= ~DFWP;
    // delay(2000);
    for (i = 0; i < CFG_PARA_SIZE; i++)
    {
        //delay(10);
        *FRAM_write_ptr++ = cfg_para[i];
        //delay(10);
    }
   SYSCFG0 = FRWPPW | PFWP;
    //SYSCFG0 |= PFWP;
}

void FRAMRead (void)
{
   unsigned int i=0;

    SYSCFG0 = FRWPPW;
    //SYSCFG0 &= ~PFWP;
    //SYSCFG0 &= ~DFWP;
     // delay(2000);
    for (i = 0; i < CFG_PARA_SIZE; i++)
    {
      
        //delay(10);
        cfg_para[i]=*FRAM_write_ptr++;
       // delay(10);
         
    }
    SYSCFG0 = FRWPPW | PFWP;
    //SYSCFG0 |= PFWP;

}




void sent_byte(uchar data)//发送一个字节数据
{
  while(UCTXIFG==0);
  UCA0TXBUF=data;  
  delay(3000);
 }

void sent_EER(uchar val)
{
  uchar i;
    
    delay(5000);  
  
    Tdata[0]='E';
    Tdata[1]='E';
    Tdata[2]='R';
    Tdata[3]=val;
  
  for(i=0;i<4;i++)
    sent_byte(Tdata[i]);
  
}

void sent_data(uint val)
{
  uchar i;
  
    delay(5000);  
  
    Tdata[0]=0xFF;
    Tdata[1]=0xFF;
    //Tdata[2]='R';
    Tdata[3]=val/256;
    Tdata[4]=val & 0x00FF;

    Tdata[5]=0x0D;
    Tdata[6]=0x0A;
  
  for(i=0;i<7;i++)
    sent_byte(Tdata[i]);

}


void Software_Trim()
{
    unsigned int oldDcoTap = 0xffff;
    unsigned int newDcoTap = 0xffff;
    unsigned int newDcoDelta = 0xffff;
    unsigned int bestDcoDelta = 0xffff;
    unsigned int csCtl0Copy = 0;
    unsigned int csCtl1Copy = 0;
    unsigned int csCtl0Read = 0;
    unsigned int csCtl1Read = 0;
    unsigned int dcoFreqTrim = 3;
    unsigned char endLoop = 0;

    do
    {
        CSCTL0 = 0x100;                         // DCO Tap = 256
        do
        {
            CSCTL7 &= ~DCOFFG;                  // Clear DCO fault flag
        }while (CSCTL7 & DCOFFG);               // Test DCO fault flag

        __delay_cycles((unsigned int)3000 * MCLK_FREQ_MHZ);// Wait FLL lock status (FLLUNLOCK) to be stable
                                                           // Suggest to wait 24 cycles of divided FLL reference clock
        while((CSCTL7 & (FLLUNLOCK0 | FLLUNLOCK1)) && ((CSCTL7 & DCOFFG) == 0));

        csCtl0Read = CSCTL0;                   // Read CSCTL0
        csCtl1Read = CSCTL1;                   // Read CSCTL1

        oldDcoTap = newDcoTap;                 // Record DCOTAP value of last time
        newDcoTap = csCtl0Read & 0x01ff;       // Get DCOTAP value of this time
        dcoFreqTrim = (csCtl1Read & 0x0070)>>4;// Get DCOFTRIM value

        if(newDcoTap < 256)                    // DCOTAP < 256
        {
            newDcoDelta = 256 - newDcoTap;     // Delta value between DCPTAP and 256
            if((oldDcoTap != 0xffff) && (oldDcoTap >= 256)) // DCOTAP cross 256
                endLoop = 1;                   // Stop while loop
            else
            {
                dcoFreqTrim--;
                CSCTL1 = (csCtl1Read & (~DCOFTRIM)) | (dcoFreqTrim<<4);
            }
        }
        else                                   // DCOTAP >= 256
        {
            newDcoDelta = newDcoTap - 256;     // Delta value between DCPTAP and 256
            if(oldDcoTap < 256)                // DCOTAP cross 256
                endLoop = 1;                   // Stop while loop
            else
            {
                dcoFreqTrim++;
                CSCTL1 = (csCtl1Read & (~DCOFTRIM)) | (dcoFreqTrim<<4);
            }
        }

        if(newDcoDelta < bestDcoDelta)         // Record DCOTAP closest to 256
        {
            csCtl0Copy = csCtl0Read;
            csCtl1Copy = csCtl1Read;
            bestDcoDelta = newDcoDelta;
        }

    }while(endLoop == 0);                      // Poll until endLoop == 1

    CSCTL0 = csCtl0Copy;                       // Reload locked DCOTAP
    CSCTL1 = csCtl1Copy;                       // Reload locked DCOFTRIM
    while(CSCTL7 & (FLLUNLOCK0 | FLLUNLOCK1)); // Poll until FLL is locked
}


#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector=EUSCI_A0_VECTOR
__interrupt void USCI_A0_ISR(void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(USCI_A0_VECTOR))) USCI_A0_ISR (void)
#else
#error Compiler not supported!
#endif
{  

  switch(__even_in_range(UCA0IV,18))
  {
    case 0x00: // Vector 0: No interrupts
         break;
    case 0x02:  // Vector 2: UCRXIFG
         Udata[data_i++]=UCA0RXBUF;
         if(data_i>6) 
         {
           data_i=0;
           data_Full_falg=1;
         }
         break;
    case 0x04:  // Vector 4: UCTXIFG
         break;
    case 0x06:  // Vector 6: UCSTTIFG
         break;
    case 0x08:  // Vector 8: UCTXCPTIFG
         break;
    default: break;
  }
  
 // sent_byte(Udata[0]);
  
}

uchar UART_RX(void)
{
  if(data_Full_falg==1)
  {
     data_Full_falg=0;
     if((Udata[0]==0x55) && (Udata[1]==0x55) && (Udata[5]==0x0D))
     {
       Uval=Udata[3]*256+Udata[4];
       Tdata[2]=Udata[2];
      switch(Udata[2])
      {
       case 0x00:  // 
         cfg_para[0]= (unsigned long)Uval;
         FRAMWrite();
         FRAMRead();
         sent_EER('0');
         break;
       case 0x80:  // 
         sent_data((unsigned int)cfg_para[0]);
         break;
       case 0x01:  // 
         cfg_para[1]= (unsigned long)Uval;
         FRAMWrite();
         FRAMRead();
         sent_EER('0');
         break;
       case 0x81:  // 
         sent_data((unsigned int)cfg_para[1]);
         break;
       case 0x02:  // 
         sent_EER('0');
         break;
       case 0x82:  // 
         break;
       case 0x03:  // 
         sent_EER('0');
         break;
       case 0x83:  // 
         break;
       case 0x04:  // 
         sent_EER('0');
         break;
       case 0x84:  // 
         break;
       case 0x05:  // 
         sent_EER('0');
         break;
       case 0x85:  // 
         break;
        default: 
          sent_EER('9');
          break;
      }
       data_i=0;
      return 1;
     }
     else 
     {
         data_i=0;
         return 0;
     }

  }
  else
    return 0;
  
}

void Init_GPIO()
{
    P1DIR = 0xFF; P2DIR = 0xFF;
    P1REN = 0xFF; P2REN = 0xFF;
    P1OUT = 0x00; P2OUT = 0x00;
}