我最近在用430AFE253,遇到些问题。
1脚输入电压大致0.6 ,2脚也是0.6,AD参考电压用内部1.2V。想用他的1024次过采样
问题1
1024次过采样的数据怎么处理,通过移位相加操作后,得出29位数据,去掉底部5位就是24位AD的数据输出吗?
问题2
预置寄存器做什么用? 模拟输入使能寄存器在253的头文件中找不到,怎么控制,怎样使能外部输入。
问题3
采样数据不稳定,底部8位飘的厉害,帮忙看看代码有什么问题吗
#include "msp430afe253.h"
#define Num_of_Results 9
/* Arrays to store SD24 conversion results */
unsigned long Ch0results[Num_of_Results];
unsigned long Ch1results[Num_of_Results];
unsigned long Ch2results[Num_of_Results];
unsigned long Ch0results2[Num_of_Results];
unsigned long Ch1results2[Num_of_Results];
unsigned long Ch2results2[Num_of_Results];
unsigned long Ch0results3[Num_of_Results];
unsigned long Ch1results3[Num_of_Results];
unsigned long Ch2results3[Num_of_Results];
void main(void)
{
volatile unsigned int i; // Use volatile to prevent removal
WDTCTL = WDTPW + WDTHOLD; // Stop WDT
P1SEL |= BIT0; // Set SMCLK at P1.0
P1SEL2 |= BIT0; // Set SMCLK at P1.0
P1DIR |= BIT0+BIT3; // P1.1 and P1.0 = output direction
//BCSCTL1 |= XT2OFF; //默认关闭XT2
//BCSCTL2 |= SELS+SELM_3; //SMLK=VLOCLK MCLK = VLO
BCSCTL3 |= LFXT1S_2; // LFXT1 = VLOCLK
BCSCTL2 |= SELM_3; //MCLK = VLO
SD24CTL = SD24REFON + SD24SSEL_2 + SD24XDIV_3; // 1.2V ref, SMCLK
SD24CCTL0 |= SD24GRP+SD24UNI +SD24LSBTOG + SD24OSR_1024; // Group with CH1
SD24INCTL0 |= SD24GAIN_2;
SD24CCTL1 |= SD24GRP+SD24DF + SD24OSR_1024; // Group with CH2
SD24CCTL2 |= SD24IE+SD24DF + SD24OSR_1024; // Enable interrupt
for (i = 0; i < 0x3600; i++); // Delay for 1.2V ref startup
SD24CCTL2 |= SD24SC; // Set bit to start conversion
__bis_SR_register(GIE); // Enter LPM0 w/ interrupts
while(1);
}
#pragma vector=SD24_VECTOR
__interrupt void SD24AISR(void)
{
// static unsigned int index = 0;
switch (SD24IV)
{
case 2: // SD24MEM Overflow
break;
case 4: // SD24MEM0 IFG
break;
case 6: // SD24MEM1 IFG
break;
case 8: // SD24MEM2 IFG
Ch0results[0] = SD24MEM0;
Ch0results[1] = SD24MEM0;
Ch0results[2]=Ch0results[0]<<13;
Ch0results[3]=Ch0results[1]&&0x003fff;
Ch0results[4]=Ch0results[0]+Ch0results[1];
Ch0results[5]=Ch0results[4]>>5;
P1OUT ^=BIT3;
break;
}
}
#define Num_of_Results 9
/* Arrays to store SD24 conversion results */
unsigned long Ch0results[Num_of_Results];
unsigned long Ch1results[Num_of_Results];
unsigned long Ch2results[Num_of_Results];
unsigned long Ch0results2[Num_of_Results];
unsigned long Ch1results2[Num_of_Results];
unsigned long Ch2results2[Num_of_Results];
unsigned long Ch0results3[Num_of_Results];
unsigned long Ch1results3[Num_of_Results];
unsigned long Ch2results3[Num_of_Results];
void main(void)
{
volatile unsigned int i; // Use volatile to prevent removal
WDTCTL = WDTPW + WDTHOLD; // Stop WDT
P1SEL |= BIT0; // Set SMCLK at P1.0
P1SEL2 |= BIT0; // Set SMCLK at P1.0
P1DIR |= BIT0+BIT3; // P1.1 and P1.0 = output direction
//BCSCTL1 |= XT2OFF; //默认关闭XT2
//BCSCTL2 |= SELS+SELM_3; //SMLK=VLOCLK MCLK = VLO
BCSCTL3 |= LFXT1S_2; // LFXT1 = VLOCLK
BCSCTL2 |= SELM_3; //MCLK = VLO
SD24CTL = SD24REFON + SD24SSEL_2 + SD24XDIV_3; // 1.2V ref, SMCLK
SD24CCTL0 |= SD24GRP+SD24UNI +SD24LSBTOG + SD24OSR_1024; // Group with CH1
SD24INCTL0 |= SD24GAIN_2;
SD24CCTL1 |= SD24GRP+SD24DF + SD24OSR_1024; // Group with CH2
SD24CCTL2 |= SD24IE+SD24DF + SD24OSR_1024; // Enable interrupt
for (i = 0; i < 0x3600; i++); // Delay for 1.2V ref startup
SD24CCTL2 |= SD24SC; // Set bit to start conversion
__bis_SR_register(GIE); // Enter LPM0 w/ interrupts
while(1);
}
#pragma vector=SD24_VECTOR
__interrupt void SD24AISR(void)
{
// static unsigned int index = 0;
switch (SD24IV)
{
case 2: // SD24MEM Overflow
break;
case 4: // SD24MEM0 IFG
break;
case 6: // SD24MEM1 IFG
break;
case 8: // SD24MEM2 IFG
Ch0results[0] = SD24MEM0;
Ch0results[1] = SD24MEM0;
Ch0results[2]=Ch0results[0]<<13;
Ch0results[3]=Ch0results[1]&&0x003fff;
Ch0results[4]=Ch0results[0]+Ch0results[1];
Ch0results[5]=Ch0results[4]>>5;
P1OUT ^=BIT3;
break;
}
}
问题4
高阻抗输入缓冲模式怎么用?